1. Field of the Invention
The present invention relates generally to an improved data processing system and, more specifically, to a computer implemented method, an apparatus, and a computer program product for using asymmetric memory.
2. Description of the Related Art
Solid state disks and other devices based on flash memory allow many more random input/output operations per second, up to two orders of magnitude more than conventional magnetic disks. Thus, they can, in principle, support workloads involving random input/output operations much more effectively.
However, flash memory cannot support general, in-place updates. Instead, a whole data page must be written to a new area of the device and the old page must be invalidated. Groups of contiguous pages form erase units and an invalidated page becomes writable again, only after the whole erase unit has been cleared. Erase times are relatively high, typically several milliseconds. Flash-based memory does, however, allow in-place changes of 1-bits to 0-bits without an erase cycle. Thus, it is possible to reserve a region of flash memory initialized to “all 1s” and incrementally use it in a write-once fashion.
When accounting for the costs of the various steps employed by an algorithm running on a flash memory, in addition to counting traditional algorithmic steps, one should count a page-write step whenever a write causes a 0 bit to change to a 1 bit. If an algorithm performs a group of local writes to a single page as one transactional step, the group is counted as a single page-write step. Even if only a few bytes are updated, a whole page must be written.
The true cost of a page-write step has several components. There is an immediate cost incurred because a full page must be copied to a new location, with the bits in question updated. If there are multiple updates to a single page from different transactional operations, the updates can be combined in random access memory and applied to the flash memory once. Care should be taken in such a scheme to guarantee data persistence, when that is an application requirement.
Also a deferred cost may be incurred because the flash device must eventually erase the erase unit containing the old page. The cost is deferred because the write itself does not have to wait for the erase to finish, and the erase can be performed asynchronously. Nevertheless, erase times are high and a device burdened by many erase operations may not be able to sustain good read and write performance. Further, in an input/output intensive workload, a steady state can be reached in which erasure cannot be performed fast enough, and writes have to wait for erased pages to become available.
An additional, longer-term cost of page erases in terms of device longevity is present. On current flash devices, an erase unit has a lifetime of about 105 erases. Thus, if special-purpose algorithms reduce the number of erases needed by a factor of f, the expected lifetime of the device can increased, in principle, by a factor of f.